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AT48801 Datasheet(PDF) 3 Page - ATMEL Corporation |
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AT48801 Datasheet(HTML) 3 Page - ATMEL Corporation |
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3 / 17 page ![]() Pin Description VCC Supply voltage. GND Ground. Port 0 Port 0 is an 8 bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-im- pedance inputs. Port 0 can also be configured to be the multiplexed low-or- der address/data bus during accesses to external pro- gram and data memory. In this mode, P0 has internal pul- lups. Port 1 Port 1 is an 8 bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the following table. Port Pin Alternate Functions P1.0 T2 (external count input to Timer/Counter 2), clock-out P1.1 T2EX (Timer/Counter 2 capture/reload trigger and direction control) Port 2 Port 2 is an 8 bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16 bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8 bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 3 Port 3 is an 8 bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by (continued) the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89C51, as shown in the following table. Port Pin Alternate Functions P3.0 RXD (serial input port) P3.1 TXD (serial output port) P3.2 INT0 (external interrupt 0) P3.3 INT1 (external interrupt 1) P3.4 T0 (timer 0 external input) P3.5 T1 (timer 1 external input) P3.6 WR (external data memory write strobe) P3.7 RD (external data memory read strobe) RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. ALE Address Latch Enable is an output pulse for latching the low byte of the address during accesses to external mem- ory. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no ef- fect if the microcrontroller is in external execution mode. PSEN Program Store Enable is the read strobe to external pro- gram memory. When the AT48801 is executing code from external pro- gram memory, PSEN is activated twice each machine cy- cle, except that two PSEN activations are skipped during each access to external data memory. EA External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external pro- gram memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program execu- tions. AT48801 1-3 |
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