3

®

ISO508

PACKAGE DRAWING

PRODUCT

PACKAGE

ISO508P

24-Pin Plastic DIP

167

ISO508P-U

24-Pin Gull Wing Surface Mount

167-4

NOTE: (1) For detailed drawing and dimension table, please see end of data

sheet, or Appendix C of Burr-Brown IC Data Book.

NAME

FUNCTION

Input Data Bus. Inputs are CMOS/TTL compatible.

Output Data Bus. Outputs are TTL compatible.

LEI

Input Latch Enable. Latch enable signal for the input data

buffer. A logic LOW will latch the input data preventing

further changes being made before data transmission

across the barrier, and transmit if in synchronous mode.

A logic HIGH will allow the data to pass from the input pins

to the input buffer.

LEO

Output Latch Enable. Latch enable signal for the output

data buffer. A logic LOW will latch the internal data to the

output pins and prevent further changes to the output

data. A logic HIGH will allow the internal data to be

passed to the output pins as soon as it becomes avail-

able.

CONT

Synchronous/Asynchronous Mode Select. A logic HIGH

selects asynchronous mode. A logic LOW selects syn-

chronous mode.

OE

Output Tri-State Enable. Makes the output data pins high

impedance to allow multiple parallel access to the data

correct logic level.

PIN CONFIGURATION

Top View

DIP

FUNCTIONAL DESCRIPTION

ABSOLUTE MAXIMUM RATINGS

Maximum Input Current, any Input Pin ............................................. 20mA

Continuous Isolation Voltage ..................................................... 1500Vrms

Storage Temperature ...................................................... –40

°C to +125°C

Lead Temperature (soldering, 10s) ............................................... +260

°C

PACKAGE INFORMATION

ELECTROSTATIC

DISCHARGE SENSITIVITY

Electrostatic discharge can cause damage ranging from per-

formance degradation to complete device failure. Burr-

Brown Corporation recommends that all integrated circuits

be handled and stored using appropriate ESD protection

methods.

ESD damage can range from subtle performance degrada-

tion to complete device failure. Precision integrated circuits

may be more susceptible to damage because very small

parametric changes could cause the device not to meet

published specifications.

1

2

3

4

5

6

7

8

9

10

11

12

V

SA

CONT

D

D

D

D

D

D

D

D

LEI

GND

A

GND

B

LEO

D

D

D

D

D

D

D

D

OE

V

SB

24

23

22

21

20

19

18

17

16

15

14

13

ISO508