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TNA089AE Datasheet(PDF) 2 Page - Renesas Technology Corp

Part # TNA089AE
Description  MPU & MCU
PDF  4 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

TNA089AE Datasheet(HTML) 2 Page - Renesas Technology Corp

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RENESAS TECHNICAL UPDATE
TN-RX*-A0
A/E
Date: Feb. 25, 2014
•Page 334 of 1209
“R/W” in the R/W column of b0 to b7 in the table for the port input data register (PIDR) in 18.3.3 is corrected to “R”.
•Page 334 of 1209
Descriptions for the port input data register (PIDR) in 18.3.3 are corrected as follows:
Before correction
PIDR indicates individual pin states of port m.
The pin states of port m can be read with the PORTm.PIDR, regardless of the values of PORTm.PDR and PORTm.PMR.
The NMI pin state is reflected in the P35 bit.
The bit corresponding to a pin that does not exist is reserved. A reserved bit is read as undefined and cannot be modified.
After correction
PIDR indicates individual pin states of port m.
The pin states of port m can be read with the PORTm.PIDR, regardless of the values of PORTm.PDR and PORTm.PMR.
The NMI pin state is reflected in the P35 bit.
The bits corresponding to pins that are not listed in Table 18.1 are reserved. The read value of a reserved bit is undefined.
Writing has no effect.
•Page 335 of 1209
Descriptions for the port mode register (PMR) in 18.3.4 are corrected as follows:
Before correction
Each bit of PORTm.PMR corresponds to each pin of port m; pin function can be specified in 1-bit units. Bits
corresponding to port m on the 64 pin-product but which do not exist on a product with fewer than 64 pins are reserved.
Write 0 to these bits.
The bit corresponding to a pin that does not exist is reserved. A reserved bit is read as 0. The write value should be 0.
After correction
Each bit of PORTm.PMR corresponds to each pin of port m; pin function can be specified in 1-bit units.
The bits corresponding to pins that are not listed in Table 18.1 and the PORT3.PMR.B5 bit of the input-only P35 pin are
reserved. A reserved bit is read as 0. The write value should be 0. When setting a value to a reserved bit, access in byte
units.
•Page 336 of 1209
Descriptions for the open drain control register 0 (ODR0) in 18.3.5 are corrected as follows:
Before correction
Bits corresponding to port m on the 64 pin-product but which do not exist on a product with fewer than 64 pins are
reserved. Write 0 to these bits.
The bit corresponding to a pin that does not exist is reserved. A reserved bit is read as 0. The write value should be 0.
After correction
The bits corresponding to pins that are not listed in Table 18.1 are reserved. A reserved bit is read as 0. The write value
should be 0. When setting a value to a reserved bit, access in byte units.
•Page 337 of 1209
Descriptions for the open drain control register 1 (ODR1) in 18.3.6 are corrected as follows:
Before correction
Bits corresponding to port m on the 64 pin-product but which do not exist on a product with fewer than 64 pins are
reserved. Write 0 to these bits.
The PORT3.ODR1.B2 bit is reserved, because the P35 pin is input only. The bit corresponding to a pin that does not exist
is reserved. A reserved bit is read as 0. The write value should be 0.
After correction
The bits corresponding to pins that are not listed in Table 18.1 and the PORT3.ODR1.B2 bit of the input-only P35 pin are
reserved. A reserved bit is read as 0. The write value should be 0. When setting a value to a reserved bit, access in byte
units.



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