AT25DL161 datasheet(3/58 Pages) ETC2

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AT25DL161 [DATASHEET]

8795F–DFLASH–1/2013

Pin Descriptions and Pinouts

Table 2-1.

Pin Descriptions

Symbol

Name and Function

Asserted

State

Type

Chip Select: Asserting the CS pin selects the device. When the CS pin is

deasserted, the device will be deselected and normally be placed in standby

mode (not deep Power-Down mode) and the SO pin will be in a high-impedance

state. When the device is deselected, data will not be accepted on the SI pin.

A high-to-low transition on the CS pin is required to start an operation and a

low-to-high transition is required to end an operation. When ending an internally

self-timed operation, such as a program or erase cycle, the device will not enter

the standby mode until the completion of the operation.

Low

Input

SCK

Serial Clock: This pin is used to provide a clock to the device and is used to

control the flow of data to and from the device. Command, address, and input

data present on the SI pin is always latched in on the rising edge of SCK, while

output data on the SO pin is always clocked out on the falling edge of SCK.

—

Input

SI (SIO)

Serial Input (Serial Input/Output): The SI pin is used to shift data into the

device. The SI pin is used for all data input including command and address

sequences. Data on the SI pin is always latched in on the rising edge of SCK.

With the Dual-Output Read Array command, the SI pin becomes an output pin

(SIO) to allow two bits (on the SO and SIO pins) of data to be clocked out on

every falling edge of SCK. To maintain consistency with SPI nomenclature, the

SIO pin will be referenced as SI throughout this document except for those

sections dealing with the Dual-Output Read Array command, in which it will be

referenced as SIO.

Data present on the SI pin will be ignored whenever the device is deselected

(CS is deasserted).

—

Input/Output

SO (SOI)

Serial Output (Serial Output/Input): The SO pin is used to shift data out from

the device. Data on the SO pin is always clocked out on the falling edge of

SCK.

With the Dual-Input Byte/Page Program command, the SO pin becomes an

input pin (SOI) to allow two bits (on the SOI and SI pins) of data to be clocked in

on every rising edge of SCK. To maintain consistency with nomenclature, the

SOI pin will be referenced as SO throughout this document except for those

sections dealing with the Dual-Input Byte/Page Program command in which it

will be referenced as SOI.

The SO pin will be in a high-impedance state whenever the device is deselected

(CS is deasserted).

—

Input/Output

Write Protect: The WP pin controls the hardware locking feature of the device.

See “Protection Commands and Features” on page 21 for more details on

protection features and the WP pin.

The WP pin is internally pulled-high and may be left floating if hardware

controlled protection will not be used. However, it is recommended that the WP

pin also be externally connected to VCC whenever possible.

Low

Input

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