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AT24C01C Datasheet(PDF) 3 Page - ATMEL Corporation |
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AT24C01C Datasheet(HTML) 3 Page - ATMEL Corporation |
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3 / 23 page ![]() 3 Atmel AT24C01C/02C [DATASHEET] 8700F–SEEPR–6/12 3. Block Diagram 4. Pin Description Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open drain driven and may be wire-ORed with any number of other open drain or open collector devices. Device/Page Addresses (A2, A1, A0): The A2, A1, and A0 pins are device address inputs that are hard wired for the AT24C01C/02C. As many as eight 1-Kbit or 2-Kbit devices may be addressed on a single bus system. See Section 7. “Device Addressing” on page 9 for more details. Write Protect (WP): The AT24C01C/02C have a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write Protect pin is connected to VCC, the write protection feature is enabled and operates as shown below in Table 4-1. Table 4-1. Write Protect Start Stop Logic VCC GND WP SCL SDA A2 A1 A0 Serial Control Logic EN H.V. Pump/Timing EEPROM Data Recovery Serial MUX DOUT/ACK Logic COMP LOAD INC Data Word Addr/counter Y DEC R/W DOUT DIN LOAD Device Address Comparator WP Pin Status Part of the Array Protected Atmel AT24C01C and AT24C02C At VCC Full (2K) Array At GND Normal Read/Write Operations |
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