CS4297A datasheet(10/52 Pages) CIRRUS

10 / 52 page

CS4297A

2. GENERAL DESCRIPTION

The CS4297A is a mixed-signal serial audio Codec

compliant to the Intel® Audio Codec ‘97 Specifica-

tion, revision 2.1 [1]. It is designed to be paired

with a digital controller, typically located on the

PCI bus or integrated within the system core logic

chip set. The controller is responsible for all com-

munications between the CS4297A and the remain-

der of the system. The CS4297A contains two

distinct functional sections: digital and analog. The

digital section includes the AC-link interface,

S/PDIF interface, serial data port, and power man-

agement support. The analog section includes the

analog input multiplexer (mux), stereo output mix-

er, mono output mixer, stereo Analog-to-Digital

Converters (ADCs), stereo Digital-to-Analog Con-

verters (DACs), and their associated volume con-

trols.

2.1

AC-Link

All communication with the CS4297A is estab-

lished with a 5-wire digital interface to the control-

ler, as shown in Figure 7. This interface is called

the AC-link. All clocking for the serial communi-

cation is synchronous to the BIT_CLK signal.

BIT_CLK is generated by the primary audio codec

and is used to clock the controller and any second-

ary audio codecs. Both input and output AC-link

audio frames are organized as a sequence of 256 se-

rial bits forming 13 groups referred to as ‘slots’.

During each audio frame, data is passed bi-direc-

tionally between the CS4297A and the controller.

The input frame is driven from the CS4297A on the

SDATA_IN line. The output frame is driven from

the controller on the SDATA_OUT line. The con-

troller is also responsible for issuing reset com-

mands via the RESET# signal. Following a Cold

Reset, the CS4297A is responsible for notifying the

controller that it is ready for operation after syn-

chronizing its internal functions. The CS4297A

AC-link signals must use the same digital supply

voltage as the controller chip, either +5 V or

+3.3 V. See Section 3, AC Link Frame Definition,

for detailed AC-link information.

2.2

Control registers

The CS4297A contains a set of AC ’97 compliant

control registers and a set of Cirrus Logic defined

control registers. These registers control the basic

functions and features of the CS4297A. Read ac-

cesses of the control registers by the AC ’97 con-

troller are accomplished with the requested register

index in Slot 1 of a SDATA_OUT frame. The fol-

lowing SDATA_IN frame will contain the read

CODEC

SYNC

BIT_CLK

SDATA_OUT

SDATA_IN

RESET#

Digital AC’97

Controller

Figure 7. AC-link Connections

CS4297A Datasheet(PDF) 10 Page - Cirrus Logic

CS4297A Datasheet(HTML) 10 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL