CPC7582

www.clare.com

9

Rev. 1.0

Ring Access Switch Zero Cross Current Turn Off

After the application of a logic input to turn SW4 off,

the ring access switch is designed to delay the change

in state until the next zero crossing. Once on, the

switch requires a zero current cross to turn off and

therefore should not be used to switch a pure DC sig-

nal. The switch will remain in the on state no matter

what logic input until the next zero crossing. For prop-

er operation, pin 13 (R

proper impedance to a ring generator or other ac

source. These switching characteristics will reduce

and possibly eliminate overall system impulse noise

normally associated with ringing access switches. The

attributes of ringing access switch SW4 may make it

possible to eliminate the need for a zero cross switch-

ing scheme. A minimum impedence of 300

with the ring generator is recommended.

Power Supplies

Both a +5V supply and battery voltage are connected

to the CPC7582. CPC7582 switch state control is

powered exclusively by the +5V supply. As a result,

the CPC7582 exhibits extremely low power dissipa-

tion during both active and idle states.

The battery voltage is not used for switch control but

rather as a reference by the integrated secondary pro-

tection circuitry. The integrated SCR is designed to

trigger when pin 2 (T

below the battery. This trigger prevents a fault induced

overvoltage event at the T

Battery Voltage Monitor

The CPC7582 also uses the voltage reference to mon-

itor battery voltage. If battery voltage is lost, the

CPC7582 will immediately enter the “all off” state and

remain in this state until the battery voltage is restored.

The device will also enter the “all off” state if the battery

voltage rises above –10V and will remain there until the

battery voltage drops below –15V. This battery monitor

feature draws a small current from the battery (<1

µA

typ.) and will add slightly to the device’s overall power

dissipation.

Protection

Diode Bridge/SCR

The CPC7582 uses a combination of current limited

break switches, a diode bridge/SCR clamping circuit

and a thermal shutdown mechanism to protect the

SLIC device or other associated circuitry from damage

during line transient events such as lightning. During a

positive transient condition, the fault current is con-

ducted through the diode bridge to ground. Voltage is

clamped to the diode drop above ground. During a

negative transient of 2 - 4 volts more negative than the

battery, the SCR conducts and faults are shunted to

ground via the SCR and diode bridge.

Also, in order for the SCR to crowbar or foldback, the

on voltage (see Table 8) of the SCR must be less neg-

ative than the battery reference voltage. If the battery

voltage is less negative the SCR on voltage, the SCR

will not crowbar, however it will conduct fault currents to

ground.

For power induction or power cross fault conditions,

the positive cycle of the transient is clamped to the

diode drop above ground and the fault current direct-

ed to ground. The negative cycle of the transient will

cause the SCR to conduct when the voltage exceeds

the battery reference voltage by two to four volts,

steering the current to ground.

Current Limiting function

If a lightning strike transient occurs when the device in

the talk/idle state, the current is passed along the line

to the integrated protection circuitry and limited by the

dynamic current limit response of break switches SW1

and SW2. When a 1000V 10x1000 pulse (LSSGR

lightning) is applied to the line though a properly

clamped external protector, the current seen at pins 2

(T

magnitude and duration of 2.5A and < 0.5ms.

If a power cross fault occurs with device in the talk/idle

state, the current is passed though the break switches

SW1 and SW2 on to the integrated protection circuit

and is limited by the dynamic DC current limit

response of the two break switches. The DC current

limit, specified over temperature, is between 80mA

and 425mA and the circuitry has a negative tempera-

ture coefficient. As a result, if the device is subjected

to extended heating due to power cross fault, the

measured current at pin 2 (T

decrease as the device temperature increases. If the

device temperature rises sufficiently, the temperature

shutdown mechanism will activate and the device will

default to the “all off” state.

Temperature Shutdown

The thermal shutdown mechanism will activate when

the device temperature reaches a minimum of 110°C

placing the device in the “all off” state regardless of

logic input. During this thermal shutdown mode, pin 7

(TSD) will read 0V. Normal output of TSD is +V

DD