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ATSTK503 Datasheet(PDF) 12 Page - List of Unclassifed Manufacturers |
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ATSTK503 Datasheet(HTML) 12 Page - List of Unclassifed Manufacturers |
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12 / 17 page ![]() 12 Only SRAM chips with center power pins can be used. See the Appendix for details. Address latch The data bus and the low byte of the address bus is multiplexed on PORTA. The ALE signal indicates when the address is present. This low byte must be stored by a latch until the memory access cycle is completed. The STK503's a latch is connected to the ALE signal. The latched low byte of the address is routed to the SRAM footprint, and is also accessible on the connector marked A[7:0]. High address jumpers Some or all of the highest eight address pins on the External Memory Interface can be disabled and used as general I/O. This feature is supported on STK503 by mounting the appropriate RAM HIGH ADDRESS jumpers. The lines which are disconnected from the SRAM footprint are pulled low so the address lines of the SRAM isn't floating. |
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