EM73P362 datasheet(7/44 Pages) EMC

7 / 44 page

This specification are subject to be changed without notice.

11.1.2001

EM73P362

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

PROGRAM COUNTER (3K ROM)

Program counter ( PC ) is composed by a 12-bit counter, which indicates the next executed address for the

instruction of program ROM.

For a 3K - byte size ROM, PC can indicate address form 000h - BFFh, for BRANCH and CALL instructions,

PC is changed by instruction indicating.

(1) Branch instruction:

SBR a

Object code: 00aa aaaa

Condition: SF=1; PC

← PC

11-6.a ( branch condition satisified )

PC Hold original PC value+1 a

aaaaa

SF=0; PC

← PC +1( branch condition not satisified)

Original PC value + 1

LBR a

Object code: 1100 aaaa aaaa aaaa

Condition: SF=1; PC

← a ( branch condition satisified)

PC aaaaaaaaaaaa

ADDRESSING MODE

(1) Indirect addressing mode:

Indirect addressing mode indicates the RAM address by specified HL register.

For example: LDAM ; Acc

← RAM[HL]

STAM ; RAM[HL]

← Acc

(2) Direct addressing mode:

Direct addressing mode indicates the RAM address by immediate data.

For example: LDA x ; Acc

← RAM[x]

STA x ; RAM[x]

← Acc

(3) Zero-page addressing mode

For zero-page region, user can using direct addressing to write or do any arithematic, comparsion or bit

manupulated operation directly.

For example: STD #k,y ; RAM[y]

← #k

ADD #k,y; RAM[y]

← RAM[y] + #k

LCD DISPLA

LCD DISPLAY RAM

Y RAM

RAM address from 40h ~ 46h, 50h ~ 56h, 60h ~ 66h are LCD display RAM, the RAM data of this region can't

be operated by instruction “LDHL xx” and “EXHL”.

Address Increment

bit

0 1 2 3 0 1 2

40h~46h (COM0)

50h~56h (COM1)

60h~66h (COM2)

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