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IO10PDB0V0 Datasheet(PDF) 150 Page - Microsemi Corporation |
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IO10PDB0V0 Datasheet(HTML) 150 Page - Microsemi Corporation |
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150 / 197 page ![]() Pin Descriptions 5- 36 R e v i sio n 1 2 32 VCCRCOSC VCCRCOSC 33 MSS_RESET_N MSS_RESET_N 34 VCCESRAM VCCESRAM 35 MAC_MDC/IO48RSB4V0 MAC_MDC/IO57RSB4V0 36 MAC_MDIO/IO49RSB4V0 MAC_MDIO/IO58RSB4V0 37 MAC_TXEN/IO52RSB4V0 MAC_TXEN/IO61RSB4V0 38 MAC_CRSDV/IO51RSB4V0 MAC_CRSDV/IO60RSB4V0 39 MAC_RXER/IO50RSB4V0 MAC_RXER/IO59RSB4V0 40 GND GND 41 VCCMSSIOB4 VCCMSSIOB4 42 VCC VCC 43 MAC_TXD[0]/IO56RSB4V0 MAC_TXD[0]/IO65RSB4V0 44 MAC_TXD[1]/IO55RSB4V0 MAC_TXD[1]/IO64RSB4V0 45 MAC_RXD[0]/IO54RSB4V0 MAC_RXD[0]/IO63RSB4V0 46 MAC_RXD[1]/IO53RSB4V0 MAC_RXD[1]/IO62RSB4V0 47 MAC_CLK MAC_CLK 48 GNDSDD0 GNDSDD0 49 VCC33SDD0 VCC33SDD0 50 VCC15A VCC15A 51 PCAP PCAP 52 NCAP NCAP 53 VCC33AP VCC33AP 54 VCC33N VCC33N 55 SDD0 SDD0 56 GNDA GNDA 57 GNDAQ GNDAQ 58 ABPS0 ABPS0 59 ABPS1 ABPS1 60 CM0 CM0 61 TM0 TM0 62 GNDTM0 GNDTM0 Pin Number PQ208 A2F200 A2F500 Notes: 1. Shading denotes pins that do not have completely identical functions from density to density. For example, the bank assignment can be different for an I/O, or the function might be available only on a larger density device. 2. *: Indicates that the signal assigned to the pins as a CLKBUF/CLKBUF_LVPECL/CLKBUF_LVDS goes through a glitchless mux. In order for the glitchless mux to operate correctly, the signal must be a free-running clock signal. Refer to the ’Glitchless MUX’ section in the SmartFusion Microcontroller Subsystem User’s Guide for more details. |
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