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IO10PDB0V0 Datasheet(PDF) 153 Page - Microsemi Corporation |
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IO10PDB0V0 Datasheet(HTML) 153 Page - Microsemi Corporation |
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153 / 197 page ![]() SmartFusion Customizable System-on-Chip (cSoC) Re vi s i on 12 5 - 39 125 TMS TMS 126 TDO TDO 127 TRSTB TRSTB 128 VJTAG VJTAG 129 VDDBAT VDDBAT 130 VCCLPXTAL VCCLPXTAL 131 LPXOUT LPXOUT 132 LPXIN LPXIN 133 GNDLPXTAL GNDLPXTAL 134 GNDMAINXTAL GNDMAINXTAL 135 MAINXOUT MAINXOUT 136 MAINXIN MAINXIN 137 VCCMAINXTAL VCCMAINXTAL 138 GND GND 139 VCC VCC 140 VPP VPP 141 VCCFPGAIOB1 VCCFPGAIOB1 142 GDA0/IO31NDB1V0 GDA0/IO40NDB1V0 143 GDA1/IO31PDB1V0 GDA1/IO40PDB1V0 144 GDC0/IO29NSB1V0 GDC0/IO38NSB1V0 145 GCA0/IO28NDB1V0 GCA0/IO36NDB1V0 * 146 GCA1/IO28PDB1V0 GCA1/IO36PDB1V0 * 147 VCCFPGAIOB1 VCCFPGAIOB1 148 GND GND 149 VCC VCC 150 IO25NDB1V0 IO30NDB1V0 151 GCC2/IO25PDB1V0 GBC2/IO30PDB1V0 152 IO23NDB1V0 IO28NDB1V0 153 GCA2/IO23PDB1V0 GCA2/IO28PDB1V0 * 154 GBC2/IO21PSB1V0 GBB2/IO27NDB1V0 155 GBA2/IO20PSB1V0 GBA2/IO27PDB1V0 Pin Number PQ208 A2F200 A2F500 Notes: 1. Shading denotes pins that do not have completely identical functions from density to density. For example, the bank assignment can be different for an I/O, or the function might be available only on a larger density device. 2. *: Indicates that the signal assigned to the pins as a CLKBUF/CLKBUF_LVPECL/CLKBUF_LVDS goes through a glitchless mux. In order for the glitchless mux to operate correctly, the signal must be a free-running clock signal. Refer to the ’Glitchless MUX’ section in the SmartFusion Microcontroller Subsystem User’s Guide for more details. |
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