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IO10PDB0V0 Datasheet(PDF) 165 Page - Microsemi Corporation |
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IO10PDB0V0 Datasheet(HTML) 165 Page - Microsemi Corporation |
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165 / 197 page  SmartFusion Customizable System-on-Chip (cSoC) Re vi s i on 12 5 - 51 T9 VAREF0 VAREF1 VAREF1 T10 ABPS0 ABPS6 ABPS6 T11 NC ABPS5 ABPS5 T12 NC SDD1 SDD1 T13 GNDVAREF GNDVAREF GNDVAREF T14 GNDMAINXTAL GNDMAINXTAL GNDMAINXTAL T15 VCCLPXTAL VCCLPXTAL VCCLPXTAL T16 PU_N PU_N PU_N Pin No. FG256 A2F060 Function A2F200 Function A2F500 Function Notes: 1. Shading denotes pins that do not have completely identical functions from density to density. For example, the bank assignment can be different for an I/O, or the function might be available only on a larger density device. 2. *: Indicates that the signal assigned to the pins as a CLKBUF/CLKBUF_LVPECL/CLKBUF_LVDS goes through a glitchless mux. In order for the glitchless mux to operate correctly, the signal must be a free-running clock signal. Refer to the ’Glitchless MUX’ section in the SmartFusion Microcontroller Subsystem User’s Guide for more details. |
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