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IO10PDB0V0 Datasheet(PDF) 175 Page - Microsemi Corporation |
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IO10PDB0V0 Datasheet(HTML) 175 Page - Microsemi Corporation |
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175 / 197 page ![]() SmartFusion Customizable System-on-Chip (cSoC) Re vi s i on 12 5 - 61 L9 VCC VCC L10 GND GND L11 VCC VCC L12 GND GND L13 VCC VCC L14 GND GND L15 VCC VCC L16 GND GND L17 GNDQ GNDQ L18 GDA2/IO33NDB1V0 GDA2/IO42NDB1V0 L19 VCCFPGAIOB1 VCCFPGAIOB1 L20 GDB1/IO30PDB1V0 GDB1/IO39PDB1V0 L21 GDB0/IO30NDB1V0 GDB0/IO39NDB1V0 L22 GDC2/IO32PDB1V0 GDC2/IO41PDB1V0 M1 NC IO71PDB5V0 M2 NC IO71NDB5V0 M3 VCCFPGAIOB5 VCCFPGAIOB5 M4 NC IO72NPB5V0 M5 GNDQ GNDQ M6 NC IO68PDB5V0 M7 GND GND M8 VCC VCC M9 GND GND M10 VCC VCC M11 GND GND M12 VCC VCC M13 GND GND M14 VCC VCC M15 GND GND M16 VCCFPGAIOB1 VCCFPGAIOB1 M17 NC NC M18 GDB2/IO33PDB1V0 GDB2/IO42PDB1V0 M19 VJTAG VJTAG M20 GND GND Pin Number FG484 A2F200 Function A2F500 Function Notes: 1. Shading denotes pins that do not have completely identical functions from density to density. For example, the bank assignment can be different for an I/O, or the function might be available only on a larger density device. 2. *: Indicates that the signal assigned to the pins as a CLKBUF/CLKBUF_LVPECL/CLKBUF_LVDS goes through a glitchless mux. In order for the glitchless mux to operate correctly, the signal must be a free-running clock signal. Refer to the ’Glitchless MUX’ section in the SmartFusion Microcontroller Subsystem User’s Guide for more details. |
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