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IO10PDB0V0 Datasheet(PDF) 193 Page - Microsemi Corporation |
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IO10PDB0V0 Datasheet(HTML) 193 Page - Microsemi Corporation |
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193 / 197 page ![]() SmartFusion Customizable System-on-Chip (cSoC) Re vi s i on 12 6 - 11 Revision 3 (continued) Two notes were added to the "Supply Pins" table (SAR 27109): 1. The following supplies should be connected together while following proper noise filtering practices: VCC33A, VCC33ADCx, VCC33AP, VCC33SDDx, VCCMAINXTAL, and VCCLPXTAL. 2. The following 1.5 V supplies should be connected together while following proper noise filtering practices: VCC, VCC15A, and VCC15ADCx. 5-1 The descriptions for the "VCC33N", "NCAP", and "PCAP" pins were revised to include information on what to do if analog SCB features and SDDs are not used (SAR 26744). 5-2, 5-9, 5-9 Information was added to the "User Pins" table regarding tristating of used and unused GPIO pins. The IO portion of the table was revised to state that unused I/O pins are disabled by Libero IDE software and include a weak pull-up resistor (SAR 26890). Information was added regarding behavior of used I/O pins during power-up. 5-6 The type for "EMC_RW_N" was changed from In/out to Out (SAR 25113). 5-12 A note was added to the "Analog Front-End (AFE)" table stating that unused analog inputs should be grounded (SAR 26744). 5-14 The "TQ144" section is new, with pin tables for A2F200 and A2F500 (SAR 27044). 5-18 The "FG256" pin table was replaced and now includes "Handling When Unused" information (SAR 27709). 5-42 Revision 2 (May 2010) Embedded nonvolatile flash memory (eNVM) was changed from "64 to 512 Kbytes" to "128 to 512 Kbytes" in the "Microcontroller Subsystem (MSS)" section and "SmartFusion cSoC Family Product Table" (SAR 26005). I, II The main oscillator range of values was changed to "32 KHz to 20 MHz" in the "Microcontroller Subsystem (MSS)" section and the "SmartFusion cSoC Family Product Table" (SAR 24906). I, II The value for tPD was changed from 50 ns to 15 ns for the high-speed voltage comparators listed in the "Analog Front-End (AFE)" section (SAR 26005). I The number of PLLs for A2F200 was changed from 2 to 1 in the "SmartFusion cSoC Family Product Table" (SAR 25093). II Values for direct analog input, total analog input, and total I/Os were updated for the FG256 package, A2F060, in the "Package I/Os: MSS + FPGA I/Os" table. The Max. column was removed from the table (SAR 26005). III The Speed Grade section of the "Product Ordering Codes" table was revised (SAR 25257). VI Revision 1 (March 2010) The "Product Ordering Codes" table was revised to add "blank" as an option for lead- free packaging and application (junction temperature range). VI Table 2-3 • Recommended Operating Conditions5,6 was revised. Ta (ambient temperature) was replaced with TJ (junction temperature). 2-3 PDC5 was deleted from Table 2-15 • Different Components Contributing to the Static Power Consumption in SmartFusion cSoCs. 2-13 The formulas in the footnotes for Table 2-29 • I/O Weak Pull-Up/Pull-Down Resistances were revised. 2-27 The values for input biased current were revised in Table 2-93 • Current Monitor Performance Specification. 2-77 Revision 0 (March 2010) The "Analog Front-End (AFE)" section was updated to change the throughput for 10- bit mode from 600 Ksps to 550 Ksps. I Revision Changes Page |
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