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AT25DF081A Datasheet(PDF) 45 Page - List of Unclassifed Manufacturers |
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AT25DF081A Datasheet(HTML) 45 Page - List of Unclassifed Manufacturers |
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45 / 54 page ![]() 45 8715C–SFLSH–1/2013 AT25DF081A 14.6 Program and Erase Characteristics Notes: 1. Maximum values indicate worst-case performance after 100,000 erase/program cycles 2. Not 100% tested (value guaranteed by design and characterization) 14.7 Power-up Conditions 14.8 Input Test Waveforms and Measurement Levels 14.9 Output Test Load Symbol Parameter Min Typ Max Units tPP(1) Page Program Time (256-Bytes) 1.0 3.0 ms tBP Byte Program Time 7 μs tBLKE(1) Block Erase Time 4-Kbytes 50 200 ms 32-Kbytes 250 600 64-Kbytes 400 950 tCHPE(1)(2) Chip Erase Time 16 28 sec tOTPP(1) OTP Security Register Program Time 200 500 μs tWRSR(2) Write Status Register Time 200 ns Symbol Parameter Min Max Units tVCSL Minimum VCC to Chip Select Low Time 100 μs tPUW Power-up Device Delay Before Program or Erase Allowed 10 ms VPOR Power-on Reset Voltage 1.5 2.5 V AC DRIVING LEVELS AC MEASUREMENT LEVEL 0.1V CC V CC/2 0.9V CC tR, tF < 2 ns (10% to 90%) DEVICE UNDER TEST 15pF (frequencies above 70MHz) or 30pF |
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