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VP3203 Datasheet(PDF) 1 Page - Supertex, Inc |
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VP3203 Datasheet(HTML) 1 Page - Supertex, Inc |
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1 / 6 page ![]() ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com VP3203 P-Channel Enhancement-Mode Vertical DMOS FET Absolute Maximum Ratings Parameter Value Drain-to-source voltage BV DSS Drain-to-gate voltage BV DGS Gate-to-source voltage ±20V Operating and storage temperature -55OC to +150OC Soldering temperature* 300OC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. * Distance of 1.6mm from case for 10 seconds. Ordering Information Device Package Options BV DSS/BVDGS (V) R DS(ON) (max) (Ω) I D(ON) (min) (A) TO-92 TO-243AA (SOT-89) Die* VP3203 VP3203N3-G VP3203N8-G VP3203ND -30 0.6 14.0 -G indicates package is RoHS compliant (‘Green’) * Mil visual screening available. Pin Configurations TO-92 (N3) Product Marking TO-243AA (SOT-89) (N8) VP2LW W = Code for week sealed = “Green” Packaging Features Free from secondary breakdown Low power drive requirement Ease of paralleling Low C ISS and fast switching speeds High input impedance and high gain Excellent thermal stability Integral source-to-drain diode Applications Motor controls Converters Amplifiers Switches Power supply circuits Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) ► ► ► ► ► ► ► ► ► ► ► ► ► General Description The Supertex VP3203 is an enhancement-mode (normally- off) transistor that utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors, and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. GATE SOURCE DRAIN TO-243AA (SOT-89) (N8) GATE SOURCE DRAIN DRAIN TO-92 (N3) YY = Year Sealed WW = Week Sealed = “Green” Packaging SiVP 3 2 0 3 Y Y W W Package may or may not include the following marks: Si or Packages may or may not include the following marks: Si or |
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