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HD74LVC74 Datasheet(PDF) 2 Page - Hitachi Semiconductor |
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HD74LVC74 Datasheet(HTML) 2 Page - Hitachi Semiconductor |
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2 / 9 page ![]() HD74LVC74 2 Function Table Inputs Outputs PR CLR CK D Q Q L H XXH L H L XXL H L L XXH *1 H *1 HH ↑ HH L HH ↑ LL H HH L X Q 0 Q 0 HH HX Q 0 Q 0 HH ↓ XQ 0 Q 0 H : High level L : Low level X : Immaterial ↓ : High to Low transition ↑ : Low to high transition Q 0: Level to Q before the indicated steady input conditions were established. Note: 1. Q and Q will remain high as long as preset and clear are low, but Q and Q are unpredictable, if preset and clear go high simultaneously. Pin Arrangement (Top view) 11 12 13 14 VCC 2CLR 2D 2CK 2PR 2Q 1 2 3 4 5 6 7 8 9 10 1CLR GND 1D 1CK 1PR 1Q 1Q 2Q D CK PR CLR Q Q D CK CLR PR Q Q |
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