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HT82K68 Datasheet(PDF) 12 Page - Holtek Semiconductor Inc

Part # HT82K68
Description  Multimedia Keyboard Encoder OTP
PDF  40 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT82K68 Datasheet(HTML) 12 Page - Holtek Semiconductor Inc

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HT82K68E
12
August 8, 2000
Preliminary
will be serviced on the latter of the two T2
pulses, if the corresponding interrupts are en-
abled. In the case of simultaneous requests, the
following table shows the priority that is ap-
plied. These can be masked by resetting the
EMI bit.
No.
Interrupt Source
Vector
a
Timer counter overflow
08H
The timer counter interrupt request flag (T0F),
enable timer counter bit (ET0I), and enable
master interrupt bit (EMI) constitute an inter-
rupt control register (INTC) which is located at
0BH in the data memory. EMI, ET0I, are used
to control the enabling/disabling of interrupts.
These bits prevent the requested interrupt
from being serviced. Once the interrupt request
flags (T0F) are set, they will remain in the
INTC register until the interrupts are serviced
or cleared by a software instruction.
It is suggested that a program does not use the
²CALL subroutine² within the interrupt sub-
routine. Because interrupts often occur in an un-
predictable manner or need to be serviced
immediately in some applications, if only one
stack is left and enabling the interrupt is not well
controlled, once the ²CALL subroutine² operates in
the interrupt subroutine it will damage the original
control sequence.
Oscillator configuration
There are two oscillator circuits in HT82K68E.
Both are designed for system clocks; the RC os-
cillator and the Crystal oscillator, which are de-
termined by mask options. No matter what
oscillator type is selected, the signal provides
the system clock. The HALT mode stops the
system oscillator and resists the external signal
to conserve power.
Register
Bit No.
Label
Function
INTC
(0BH)
0
EMI
Controls the master (global) interrupt
(1= enabled; 0= disabled)
1
¾
Undefined, read as "0"; programming must be "0"
2
ET0I
Controls the timer counter interrupt
(1= enabled; 0= disabled)
3
¾
Undefined, read as "0"
4
¾
Undefined, read as "0"; programming must be "0"
5
T0F
Internal timer counter request flag
(1= active; 0= inactive)
6
¾
Undefined, read as "0"
7
¾
Unused bit, read as "0"
INTC register
Crystal Oscillator
RC Oscillator
OSC1
OSC2
OSC1
OSC2
V
DD
f
SYS/4
(NMOS Open
Drain Output)
System oscillator



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