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HDM8513 Datasheet(PDF) 54 Page - Hynix Semiconductor

Part # HDM8513
Description  DVB/DSS Compliant Receiver
PDF  67 Pages
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HDM8513 Datasheet(HTML) 54 Page - Hynix Semiconductor

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54
Example for determination of internal clock
Desired internal clock:
External clock supplied:
N divider ratio range: 1 – 31 (integer)
M divider ratio range: 1 or 4 (integer)
Calculation is as follows:
<Example 1>
Desired internal clock: 60MHz
External clock supplied: 16MHz
N divider ratio range: 1 – 31 (integer)
M divider ratio range: 1 or 4 (integer)
Calculation is as follows: 60 =16 x N/M
Case M =4, N must be 15
Case M =1, N is impossible
Only one possible case exists
<Example 2>
Desired internal clock: 60MHz
External clock supplied: 4MHz
N divider ratio range: 1 – 31 (integer)
M divider ratio range: 1 or 4 (integer)
Calculation is as follows: 60 =4 x N/M
Case M =1, N must be 15
Case M =4, N is impossible
Only one possible case exists.
fint_clk
fext_clk
fint_clk =
M
N
fext_clk



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