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AV9170 Datasheet(PDF) 4 Page - Integrated Circuit Systems |
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AV9170 Datasheet(HTML) 4 Page - Integrated Circuit Systems |
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4 / 11 page ![]() 4 AV9170 1 S F0 S F1 K L C2 K L C 0 0 1 1 0 1 0 1 4 x N I 8 x N I 2 x N I 6 1 x N I 2 x N I 4 x N I N I 8 x N I 1 S F0 S F1 K L C2 K L C 0 0 1 1 0 1 0 1 2 x N I 4 x N I N I 8 x N I N I 2 x N I 2 ÷ N I 4 x N I Figure 4: Input and Output Clock Waveforms with CLK2 Connected to FBIN Using CLK2 Feedback Connecting CLK2 to FBIN as shown in Figure 2 will cause all of the rising edges to be aligned (Figure 4). Figure 5: Input and Output Clock Waveforms with CLK1 Connected to FBIN Table 2: Functionality Table for AV9170-01, -02 with CLK2 Feedback Table 3: Functionality Table for AV9170-01, -02 with CLK1 Feedback Using CLK1 Feedback With CLK1 connected to FBIN as shown in Figure 3, the input and CLK1 output will be aligned on the rising edge, but CLK2 can be either rising or falling (Figure 5). Consult ICS if the CLK1 frequency is desired to be higher than 107MHz. For CLK2 frequencies 10 - 53.5 MHz* (-01) For CLK2 frequencies 2.5 - 13.37 MHz (-02) *Maximum 33.3 MHz @ 3.3V (-01), 8.33 MHz @ 3.3V (-02) Figure 2: For CLK1 frequencies 20 - 107 MHz (-01) For CLK1 frequencies 5 - 26.75 MHz (-02) Maximum 66.7 MHz @ 3.3V (-01), 16.7 MHz @ 3.3V (-02) Figure 3: |
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