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ICS9250-10 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS9250-10 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
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1 / 16 page ![]() Integrated Circuit Systems, Inc. General Description Features ICS9250-10 PRODUCT PREVIEW documents contain information on new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. Preliminary Product Preview Block Diagram Pentium II is a trademark of Intel Corporation I 2C is a trademark of Philips Corporation Frequency Timing Generator for Pentium II Systems 9250-10 Rev J 6/15/99 Pin Configuration Generates the following system clocks: - 3 CPU (2.5V) 66.6/100 MHz (up to 133MHz through I2C selection) - 9 SDRAM (3.3V) up to 133MHz - 8PCI(3.3V)@33.3MHz -2IOAPIC(2.5V)@16.67or33.3MHz - 2 Hublink clocks (3.3 V) @ 66.6 MHz - 2 USB (3.3V) @ 48 MHz ( Non spread spectrum) - 1REF(3.3V)@14.318MHz Supports spread spectrum modulation , down spread 0 to -0.5% I2C support for power management Efficient power management scheme through PD# Uses external 14.138 MHz crystal 56-Pin 300 mil SSOP The ICS9250-10 is a single chip clock for Intel Pentium II. It provides all necessary clock signals for such a system. Spread spectrum may be enabled through I2C programming. Spread spectrum typically reduces EMI by 8dB to 10 dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9250-10 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. Power Groups VDD0, GND0 =REF & Crystal VDD1,GND1=3V66[1:0] VDD2,GND2=PCICLK[7:0] VDD3,GND3=PLLcore VDD4,GND4= 48MHz[1:0] VDD5,GND5 =SDRAM_F,SDRAM[7:0] VDDL0,GNDL0=CPUCLK[2:0] VDDL1,GNDL1=IOAPIC[1:0] *60K ohm pull-up to VDD on indicated inputs. |
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