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80960CF-16 Datasheet(PDF) 4 Page - Intel Corporation |
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80960CF-16 Datasheet(HTML) 4 Page - Intel Corporation |
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4 / 62 page  CONTENTS PAGE Figure 15 Relative Timings Waveforms 33 Figure 16 Output Delay or Hold vs Load Capacitance 33 Figure 17 Rise and Fall Time Derating at Highest Operating Temperature and Minimum VCC 34 Figure 18 ICC vs Frequency and Temperature 34 Figure 19 Cold Reset Waveform 36 Figure 20 Warm Reset Waveform 37 Figure 21 Entering the ONCE State 38 Figure 22a Clock Synchronization in the 2x Clock Mode 39 Figure 22b Clock Synchronization in the 1x Clock Mode 39 Figure 23 Non-Burst Non-Pipelined Requests without Wait States 40 Figure 24 Non-Burst Non-Pipelined Read Request with Wait States 41 Figure 25 Non-Burst Non-Pipelined Write Request with Wait States 42 Figure 26 Burst Non-Pipelined Read Request without Wait States 32-Bit Bus 43 Figure 27 Burst Non-Pipelined Read Request with Wait States 32-Bit Bus 44 Figure 28 Burst Non-Pipelined Write Request without Wait States 32-Bit Bus 45 Figure 29 Burst Non-Pipelined Write Request with Wait States 32-Bit Bus 46 Figure 30 Burst Non-Pipelined Read Request with Wait States 16-Bit Bus 47 CONTENTS PAGE Figure 31 Burst Non-Pipelined Read Request with Wait States 8-Bit Bus 48 Figure 32 Non-Burst Pipelined Read Request without Wait States 32-Bit Bus 49 Figure 33 Non-Burst Pipelined Read Request with Wait States 32-Bit Bus 50 Figure 34 Burst Pipelined Read Request without Wait States 32-Bit Bus 51 Figure 35 Burst Pipelined Read Requests with Wait States 32-Bit Bus 52 Figure 36 Burst Pipelined Read Requests with Wait States 16-Bit Bus 53 Figure 37 Burst Pipelined Read Requests with Wait States 8-Bit Bus 54 Figure 38 Using External READY 55 Figure 39 Terminating a Burst with BTERM 56 Figure 40 BOFF Functional Timing 57 Figure 41 HOLD Functional Timing 57 Figure 42 DREQ and DACK Functional Timing 58 Figure 43 EOP Functional Timing 58 Figure 44 Terminal Count Functional Timing 59 Figure 45 FAIL Functional Timing 59 Figure 46 A Summary of Aligned and Unaligned Transfers for Little Endian Regions 60 Figure 47 A Summary of Aligned and Unaligned Transfers for Little Endian Regions (Continued) 61 Figure 48 Idle Bus Operation 62 4 |
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