RC28F160C3 datasheet(16/59 Pages) INTEL

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3 VOLT ADVANCED+ BOOT BLOCK

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Table 6. Command Codes and Descriptions

Code

Device Mode

Description

Read Array

Places device in read array mode, such that array data will be output on the

data pins.

Program

Set-Up

This is a two

-cycle command. The first cycle prepares the CUI for a program

operation. The second cycle latches addresses and data information and

initiates the WSM to execute the Program algorithm. The flash outputs status

after programming to read array data. See Section 3.2.5.

Erase

Set-Up

Prepares the CUI for the Erase Confirm command. If the next command is not

an Erase Confirm command, then the CUI will (a) set both SR.4 and SR.5 of the

status register to a “1,” (b) place the device into the read status register mode,

and (c) wait for another command. See Section 3.2.6.

Erase Confirm

Program/Erase

Resume

Unlock Block

If the previous command was an Erase Set-Up command, then the CUI will

close the address and data latches, and begin erasing the block indicated on the

address pins. During program/erase, the device will respond only to the Read

Status Register, Program Suspend and Erase Suspend commands and will

output status register data when CE# or OE# is toggled.

If a program or erase operation was previously suspended, this command will

resume that operation.

If the previous command was Configuration Set-Up, the CUI will latch the

address and unlock the block indicated on the address pins. If the block had

been previously set to Lock-Down, this operation will have no effect. (Sect. 3.3)

Program

Suspend

Erase

Suspend

Issuing this command will begin to suspend the currently executing

program/erase operation. The status register will indicate when the operation

has been successfully suspended by setting either the program suspend (SR.2)

or erase suspend (SR.6) and the WSM Status bit (SR.7) to a “1” (ready). The

WSM will continue to idle in the SUSPEND state, regardless of the state of all

input control pins except RP#, which will immediately shut down the WSM and

the remainder of the chip if RP# is driven to VIL. See Sections 3.2.5.1 and

3.2.6.1.

Read Status

This command places the device into read status register mode. Reading the

device will output the contents of the status register, regardless of the address

presented to the device. The device automatically enters this mode after a

program or erase operation has been initiated. See Section 3.2.3.

Clear Status

The WSM can set the Block Lock Status (SR.1) , V PP Status (SR.3), Program

Status (SR.4), and Erase Status (SR.5) bits in the status register to “1,” but it

cannot clear them to “0.” Issuing this command clears those bits to “0.”

Read

Configuration

Puts the device into the Read Configuration mode, so that reading the device

will output the manufacturer/device codes or block lock status. Section 3.2.2.

Configuration

Set-Up

Prepares the CUI for changes to the device configuration, such as block locking

changes. If the next command is not Block Unlock, Block Lock, or Block Lock-

Down, then the CUI will set both the Program and Erase Status register bits to

indicate a command sequence error. See Section 3.3.

Lock-Block

If the previous command was Configuration Set-Up, the CUI will latch the

address and lock the block indicated on the address pins. (Section 3.3)

RC28F160C3 Datasheet(PDF) 16 Page - Intel Corporation

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