4-278

Timing Waveforms

SYMBOL

PARAMETER

MIN

MAX

UNITS

TEST CONDITIONS

(1)

TIVOV

Propagation Delay Input to Output

-

35

ns

Notes 2, 3

(2)

TSHOV

Propagation Delay STB to Output

-

55

ns

Notes 2, 3

(3)

TEHOZ

Output Disable Time

-

35

ns

Notes 2, 3

(4)

TELOV

Output Enable Time

-

50

ns

Notes 2, 3

(5)

TIVSL

Input to STB Setup Time

0

-

ns

Notes 2, 3

(6)

TSLIX

Input to STB Hold Time

25

-

ns

Notes 2, 3

(7)

TSHSL

STB High Time

25

-

ns

Notes 2, 3

(8)

TR, TF

Input Rise/Fall Times

-

20

ns

Notes 2, 3

NOTES:

1. Output load capacitance is rated at 300pF for ceramic and plastic packages.

2. All AC parameters tested as per test circuits and definitions below. Input rise and fall times are driven at 1ns/V.

TR, TF (8)

TIVSL (5)

TSLIX

(6)

2.0V

0.8V

VOH -0.1V

TELOV (4)

VOL +0.1V

2.4V

0.8V

TEHOZ (3)

TSHSL (7)

(1)

TIVOV

TSHOV (2)

INPUTS

STB

OUTPUTS

OE

Test Load Circuits

NOTE: Includes stray and jig capacitance.

OUTPUT

TEST

300pF

150

Ω

1.7V

POINT

(NOTE)

TIVOV, TSHOV, TELOV

OUTPUT

TEST

50pF

300

Ω

0.6V

POINT

(NOTE)

TEHOZ OUTPUT HIGH DISABLE

OUTPUT

TEST

50pF

300

Ω

3.3V

POINT

(NOTE)

TEHOZ OUTPUT LOW DISABLE

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