P82C42PD datasheet(25/25 Pages) INTEL

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UPI-C42UPI-L42

Table 4 UPI Instruction Set

(Continued)

Mnemonic

Description

Bytes

Cycles

CONTROL

(Continued)

SUSPEND

Invoke Suspend Power-

down mode

NOP

No Operation

REGISTERS

INC Rr

Increment register

INC

Increment data

memory

DEC Rr

Decrement register

SUBROUTINE

CALL addr

Jump to subroutine

RET

Return

RETR

Return and restore

status

FLAGS

CLR C

Clear Carry

CPL C

Complement Carry

CLR F0

Clear Flag 0

CPL F0

Complement Flag 0

CLR F1

Clear F1 Flag

CPL F1

Complement F1 Flag

Mnemonic

Description

Bytes

Cycles

BRANCH

JMP addr

Jump unconditional

JMPP

Jump indirect

DJNZ Rr addr

Decrement register

and jump

JC addr

Jump on Carry e 12

JNC addr

Jump on Carry e 02

JZ addr

Jump on A Zero

JNZ addr

Jump on A not Zero

JT0 addr

Jump on T0 e 12

JNT0 addr

Jump on T0 e 02

JT1 addr

Jump on T1 e 12

JNT1 addr

Jump on T1 e 02

JF0 addr

Jump on F0 Flag e 12

JF1 addr

Jump on F1 Flag e 12

JTF addr

Jump on Timer Flag

1 Clear Flag

JNIBF addr

Jump on IBF Flag

JOBF addr

Jump on OBF Flag

JBb addr

Jump on Accumula-

for Bit

UPI-C42UPI-L42 Only

REVISION SUMMARY

The following has been changed since Revision

-003

1 Delete all references to standby power down

mode

The following has been changed since Revision

-002

1 Added information on keyboard controller prod-

uct family

2 Added IHI specification for the UPI-L42

The following has been changed since Revision

-001

1 Added UPI-L42 references and specification

P82C42PD Datasheet(PDF) 25 Page - Intel Corporation

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