2

ACTS161MS

Functional Diagram

TRUTH TABLE

OPERATING MODE

INPUTS

OUTPUTS

MR

CP

PE

TE

SPE

TC

Reset (Clear)

L

X

X

X

X

X

L

L

Parallel Load

H

X

X

I

I

L

L

H

X

X

I

h

H

(Note 1)

Count

H

h

h

h (Note 3)

X

count

(Note 1)

Inhibit

H

X

I (Note 2)

X

h (Note 3)

X

(Note 1)

H

X

X

I (Note 2)

h (Note 3)

X

L

H = High Steady State, L = Low Steady State, h = High voltage level one setup time prior to the Low-to-High clock transition, I = Low volt-

age level one setup time prior to the Low-to-High clock transition, X = Don’t Care,q = Lower case letters indicate the state of the referenced

output prior to the Low-to-High clock transition,

= Low-to-High Transition.

NOTES:

1. The TC output is High when TE is High and the counter is at Terminal Count (HHHH).

2. The High-to-Low transition of PE or TE should only occur while CP is High for conventional operation.

3. The Low-to-High transition of SPE should only occur while CP is High for conventional operation.

CP

MR

T3

PD3

12

Q2

11

Q3

15

TC

Q3

TE

CP

MR

T2

PD2

13

Q1

Q2

CP

MR

T1

PD1

1

MR

Q1

CP

MR

T0

PD0 Q0

14

Q0

GND

9

SPE

2

CP

10

TE

7

PE

TE

Q3

Q2

Q1

Q0

P3

6

P2

5

P1

4

P0

3

Spec Number

518893