10

Figure 10 shows the upper gate drive (BOOT pin) supplied

develops a floating supply voltage referenced to the PHASE

pin. This supply is refreshed each cycle to a voltage of VCC

turns on. Logic-level MOSFETs can only be used if the

MOSFETs absolute gate-to-source voltage rating exceeds

Figure 11 shows the upper gate drive supplied by a direct

less. The peak upper gate-to-source voltage is approximately

for the bias, the gate-to-source voltage of Q1 is 7V. A logic-

level MOSFET is a good choice for Q1 and a logic-level

MOSFET can be used for Q2 if its absolute gate-to-source

Schottky Selection

Rectifier D2 is a clamp that catches the negative inductor

swing during the dead time between turning off the lower

MOSFET and turning on the upper MOSFET. The diode must

be a Schottky type to prevent the lossy parasitic MOSFET

body diode from conducting. It is acceptable to omit the diode

and let the body diode of the lower MOSFET clamp the

negative inductor swing, but efficiency will drop one or two

percent as a result. The diode's rated reverse breakdown

voltage must be greater than the maximum input voltage.

+12V

PGND

HIP6004

GND

LGATE

UGATE

PHASE

BOOT

VCC

+5V or +12V

NOTE:

NOTE:

Q1

Q2

+

-

FIGURE 10. UPPER GATE DRIVE - BOOTSTRAP OPTION

D2

+12V

PGND

HIP6004

GND

LGATE

UGATE

PHASE

BOOT

+5V OR LESS

NOTE:

NOTE:

Q1

Q2

+

-

D2

HIP6004