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HIP6004ACB Datasheet(PDF) 7 Page - Intersil Corporation |
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HIP6004ACB Datasheet(HTML) 7 Page - Intersil Corporation |
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7 / 12 page ![]() 2-68 For an equation for the ripple current see the section under component guidelines titled ‘Output Inductor Selection’ . A small ceramic capacitor should be placed in parallel with ROCSET to smooth the voltage across ROCSET in the presence of switching noise on the input voltage. Output Voltage Program The output voltage of a HIP6004A converter is programmed to discrete levels between 1.8VDC and 3.5VDC. The voltage identification (VID) pins program an internal voltage reference (DACOUT) with a TTL- compatible 5-bit digital-to-analog converter (DAC). The level of DACOUT also sets the PGOOD and OVP thresholds. Table 1 specifies the DACOUT voltage for the 32 different combinations of connections on the VID pins. The output voltage should not be adjusted while the converter is delivering power. Remove input power before changing the output voltage. Adjusting the output voltage during operation could toggle the PGOOD signal and exercise the overvoltage protection. All VID pin combinations resulting in a 0V output setting activate the Power-On Reset function, disable the gate drive circuitry and output a 0 logic at PGOOD pin. Application Guidelines Layout Considerations As in any high frequency switching converter, layout is very important. Switching current from one power device to another can generate voltage transients across the impedances of the interconnecting bond wires and circuit traces. These interconnecting impedances should be minimized by using wide, short printed circuit traces. The critical components should be located as close together as possible, using ground plane construction or single point grounding. Figure 5 shows the critical power components of the converter. To minimize the voltage overshoot the interconnecting wires indicated by heavy lines should be part of ground or power plane in a printed circuit board. The components shown in Figure 5 should be located as close TABLE 1. OUTPUT VOLTAGE PROGRAM PIN NAME NOMINAL OUTPUT VOLTAGE DACOUT PIN NAME NOMINAL OUTPUT VOLTAGE DACOUT VID4 VID3 VID2 VID1 VID0 VID4 VID3 VID2 VID1 VID0 01111 0 11111 0 01110 0 11110 2.1 01101 0 11101 2.2 01100 0 11100 2.3 01011 0 11011 2.4 01010 0 11010 2.5 01001 0 11001 2.6 01000 0 11000 2.7 00111 0 10111 2.8 00110 0 10110 2.9 0 0 1 0 1 1.80 1 0 1 0 1 3.0 0 0 1 0 0 1.85 1 0 1 0 0 3.1 0 0 0 1 1 1.90 1 0 0 1 1 3.2 0 0 0 1 0 1.95 1 0 0 1 0 3.3 0 0 0 0 1 2.00 1 0 0 0 1 3.4 0 0 0 0 0 2.05 1 0 0 0 0 3.5 NOTE: 0 = connected to GND or VSS, 1 = connected to VDD through pull-up resistors. PGND LO CO LGATE UGATE PHASE Q1 Q2 D2 VIN VOUT RETURN HIP6004A CIN FIGURE 5. PRINTED CIRCUIT BOARD POWER AND GROUND PLANES OR ISLANDS HIP6004A |
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