2-257

Functional Pin Description

VSEN1, VSEN2 (Pins 22 and 15)

These pins are connected to the PWM converters’ output

voltages. The PGOOD and OVP comparator circuits use

these signals to report output voltage status and for over-

voltage protection. VSEN2 provides the input power to the

integrated linear regulator.

OCSET1, OCSET2 (Pins 23 and 9)

point according to the following equation:

An over-current trip cycles the soft-start function. Sustaining an

over-current for 2 soft-start intervals shuts down the controller.

Additionally, OCSET1 is an output for the inverted FAULT

signal (FAULT). If a fault condition causes FAULT to go high,

OCSET1 will be simultaneously pulled to ground though an

SS (Pin 12)

Connect a capacitor from this pin to ground. This capacitor,

along with an internal 11

µA current source, sets the soft-

start interval of the converter.

Pulling this pin low (typically below 1.0V) with an open drain

signal will shutdown the IC.

VID0, VID1, VID2, VID3, VID4 (Pins 7, 6, 5, 4 and 3)

VID0-4 are the input pins to the 5-bit DAC. The states of these

five pins program the internal voltage reference (DACOUT).

The level of DACOUT sets the core converter output voltage

COMP1, COMP2, and FB1, FB2

(Pins 20, 11, 21, and 10)

COMP1, 2 and FB1, 2 are the available external pins of the

PWM error amplifiers. Both the FB pins are the inverting

input of the error amplifiers. Similarly, the COMP pins are the

error amplifier outputs. These pins are used to compensate

the voltage-control feedback loops of the PWM converters.

GND (Pin 17)

Signal ground for the IC. All voltage levels are measured with

respect to this pin.

PGOOD (Pin 8)

PGOOD is an open collector output used to indicate the

status of the PWM converter output voltages. This pin is

pulled low when the core output is not within

±10% of the

DACOUT reference voltage, or when any of the other

outputs are below their under-voltage thresholds.

The PGOOD output is open for VID codes that inhibit

operation. See Table 1.

PHASE1, PHASE2 (Pins 26 and 2)

Connect the PHASE pins to the respective PWM

converter’s upper MOSFET source. These pins are used to

monitor the voltage drop across the upper MOSFETs for

over-current protection.

UGATE1, UGATE2 (Pins 27 and 1)

Connect UGATE pins to the respective PWM converter’s

upper MOSFET gate. These pins provide the gate drive for

the upper MOSFETs.

PGND (Pin 24)

This is the power ground connection. Tie the synchronous

PWM converter’s lower MOSFET source to this pin.

LGATE1 (Pin 25)

Connect LGATE1 to the synchronous PWM converter’s lower

MOSFET gate. This pin provides the gate drive for the lower

MOSFET.

VCC (Pin 28)

Provide a 12V bias supply for the IC to this pin. This pin also

provides the gate bias charge for all the MOSFETs

controlled by the IC.

FAULT/RT (Pin 13)

This pin provides oscillator switching frequency adjustment.

200kHz switching frequency is increased according to the

following equation:

to VCC reduces the switching frequency according to the

following equation:

Nominally, this pin voltage is 1.26V, but is pulled to VCC in

the event of an over-voltage or over-current condition.

GATE3 (Pin 18)

Connect this pin to the gate of an external MOSFET. This pin

provides the drive for the linear controller’s pass transistor.

FB3 (Pin 19)

Connect this pin to a resistor divider to set the linear

controller output.

VOUT4 (Pin 16)

Output of the linear regulator. Supplies current up to 230mA.

I

PEAK

I

OCSET

R

OCSET

×

r

DS ON

()

----------------------------------------------------

=

Fs

200kHz

510

6

×

R

()

---------------------

+

≈

Fs

200kHz

410

7

×

R

()

---------------------

–

≈

HIP6019