| Electronic Components Datasheet Search |
|
HSP50307SC Datasheet(PDF) 5 Page - Intersil Corporation |
|
|
|||||||||||||||||||||||||||||
HSP50307SC Datasheet(HTML) 5 Page - Intersil Corporation |
|
5 / 8 page ![]() 7-72 Applications Example Figure 4 shows an applications example of the HSP50307. The MCLK source operates at 25.6MHz, and the RCLK operates at 2.048MHz. 0.1 µF capacitors are connected from the IBBOUT to IBBIN and the QBBOUT to QBBIN, providing AC coupling to the Analog Upconverter Section of the HSP50307. The control processor sends the 23-bit control word via the three-wire interface. The data source receives the 256kHz TXCLK from the HSP50307 and transmits data and enable signal at the 256kHz rate. The DAC_REF and VCM_REF are connected to 0.1 µF capacitors to ground. Each of the differential drivers are loaded with a 37.5 Ω resistor and a 0.1µF capacitor. The 37.5 Ω resistors provide matching to the 75Ω cable. The capacitors perform AC coupling. The drive paths are sent to the cable transformer for data transmissions. Table 3 shows the general functional specifications for the applications example shown in Figure 4. It gives an overview of what is being accomplished but does not specify an exact carrier frequency or other programmable functions. These specifications are met given a valid control word combination and the applications circuit shown in Figure 4. Table 4 sum- marizes the performance of the applications example shown in Figure 4. Again, these specifications are met given a valid programmed mode. NOTE: The HSP50307 is sensitive to layout. Users must make sure the input signals do not couple back into the output signals. The performance of the HSP50307 is also sensitive to the decoupling capacitors between 1) QBBOUT and QBBIN and 2) IBBOUT and IBBIN. The values shown in Figure 4 are recommended. 0.1 µF CCLK C_EN DVCC RCLK AGND VCO_IN AVCC MOD_OUT- MOD_OUT+ AVDD AGND CDATA PD_OUT VCO_SET 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 MCLK TX_EN TX_DATA RESET DGND AGND QBBOUT QBBIN IBBIN DAC_REF VCM_REF TXCLK AVCC IBBOUT 0.1 µF 0.1 µF 0.1 µF +5VANALOG 0.1 µF DGND AGND 25.6MHz OSC DATA SOURCE 0.1 µF DGND CONTROL PROC. 2.048MHz OSC 0.01 µF 2k Ω 6.25k Ω 100pF 0.01 µF +5VANALOG 37.5 Ω 0.1µF CABLE TRANSFORMER 37.5 Ω 0.1µF 0.1 µF +9VANALOG +5VDIGITAL AGND FIGURE 4. APPLICATIONS EXAMPLE OF THE HSP50307 RFOUT HSP50307 |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |