16

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notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

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ISL84541, ISL84542, ISL84543, ISL84544

Small Outline Transistor Plastic Packages (SOT23-8)

NOTES:

1. Dimensioning and tolerances per ANSI 14.5M-1982.

2. Package patterned after EIAJ SC-74 (1992).

3. Dimensions D and E1 are exclusive of mold flash, protrusions, or

gate burrs.

4. Footlength L measured at reference to seating plane.

5. “L” is the length of flat foot surface for soldering to substrate.

6. “N” is the number of terminal positions.

7. Controlling dimension: MILLIMETER. Converted inch dimen-

sions are for reference only.

D

E

E1

L

C

L

C

α

C

L

e

b

C

L

A2

A

A1

C

L

0.20 (0.008) M

0.10 (0.004) C

C

-C-

SEATING

PLANE

12

3

4

5

6

87

P8.064

8 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE

SYMBOL

INCHES

MILLIMETERS

NOTES

MIN

MAX

MIN

MAX

A

0.036

0.057

0.90

1.45

-

A1

0.000

0.0059

0.00

0.15

-

A2

0.036

0.051

0.90

1.30

-

b

0.011

0.018

0.28

0.45

-

C

0.0036

0.0078

0.09

0.20

-

D

0.111

0.118

2.80

3.00

3

E

0.103

0.118

2.60

3.00

-

E1

0.060

0.068

1.50

1.75

3

e

0.0256 Ref

0.65 Ref

-

e1

0.0768 Ref

1.95 Ref

-

L

0.012

0.020

0.30

0.50

4, 5

N8

8

6

α

-

Rev. 1 10/01