Mitigation technique for SET

AN2984

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Doc ID 15690 Rev 1

As can be seen, the best solution recommended in critical applications is the one given in

Figure 4, with an additional capacitor of at least 60 µF connected before the RC filter.

Finally, some additional recommendations in order to minimize the output voltage glitches:

a)

Use low ESR (< 30 m

Ω), low ESL (10 - 20 nH) ceramic capacitors or others rated

for high speed applications.

b)

ESL can be reduced using an array of parallel capacitors.

c)

GND: implement star bus topology or a plane.

d)

e)

A 10 nF cap between OUT and ADJ runs as an effective noise filter and improves

stability; it is essential in remote sensing configuration.

In conclusion, most SETs can be mitigated by means of external components: input and

output resistors, output series Schottky diodes, and RC filters, resulting in greatly reduced

SET sensitivity and remaining SETs with small amplitude (below 200 mV) and short

duration (< 20 ns).

Figure 6.

SET cross-section vs. LET diagram

RHFL4913A + filter and other SET mitigation

RHFL4913A + filter and other SET mitigation