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AN2159 Datasheet(PDF) 8 Page - STMicroelectronics |
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AN2159 Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 23 page ![]() SPI operations AN2159 8/23 Doc ID 11400 Rev 3 The command byte will be then composed like this: 1 bit DATA value + 6-bits address +1 bit (0 or 1). In this case the binary command will be 01011111 (0x5F) or 01011110 (0x5E). The writing procedure timing is shown in Figure 3. t1 → t2 (> 30 ns): SPI out of idle state t2 → t3 (> 30 ns): SPI enabled for write operation t3: data value is placed in SDA t4: SDA value is stable and shifted into the device t3 → t5 (> 10 µs): writing clock period t3 → t5: 1 bit data value t5 → t6: 6 bits address of the destination latch t6 → t7: 1 bit EXE command t8: end of SPI writing t9: SPI enters idle state Commands for changing configuration bits and system signals should be sent during active signals SCS and SYN as it is shown in Figure 3. The SYN must be put low in order to disable SDA output driver of the device and make the SDA as an input pin. A string of commands can be send within one period of active signals SCS and SYN or command can be followed by reading the data record but, in this case, the SYN should be deactivated in order to enable SDA output driver and a SYN pulse should be applied before activation of SCS in order to latch the data. Given the connection between STPMxx and a microcontroller as shown in the previous paragraph, it is possible to implement the writing procedure in the firmware through the following steps: Figure 3. Timing for writing configuration bits and mode signals t 2 t 1 t 4 t 3 t 6 t 5 t 8 t 7 t 9 SDA SCL SYN SCS |
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