AN1751 - APPLICATION NOTE

3/7

2- ESD and latch-up measurements

I/O lines of a cellular phone must be protected against ESD. Most popular ESD standard is the

IEC61000-4-2 having a surge generator defined in

figure 5.

R1

C1

GND

GND

+

+

--

To pin

C2

L1

R2

L2

Fig. 5: IEC61000-4-2 generator and the result on a non protected integrated circuit die.

IEC61000-4-2 specifies C1 charged up to 8kV (contact) and 15kV (air discharge). The MIL-STD 883E

Method 3015.7 is also a reference.

All external pins (bottom connectors, microphone jack…) may be subjected to these kinds of surges. If no

protection is used, result will be the destruction of the internal silicon chip. Destroyed I/O is generally a

short circuit as silicon melt on a very small area as shown in

figure 5.

If ESD protection device is the minimun to prevent failure, layout is also very important as very high dI/dt of

surge will generate a high LdI/dt.

This means even with a protection device, an integrated circuit can be destroyed because of layout

problem.

Figure 6 explains differences between 2 layouts.

L1

L2

L3

L6

V

IC

V

IN

V

CL

Correct layout

L1

L3

L4

L5

L6

V

IC

V

IN

V

CL

L2

Wrong layout

Fig. 6: Two layouts for two very different results.

Knowing all PCB tracks are equivalent to an inductance, in the first case the IC will see a voltage:

With a track lengh, for protection device connection, of 2 cm (1cm from side to side), 35µ thickness, 0.5mm

wide (microstrip track) then L2+L3 = 8nH

Considering a 15kV ESD surge surge having dI/dt = 50A/0.7ns