Sepic topology for PFC converter

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Sepic topology for PFC converter

The most widely used topology in PFC applications is boost topology. It has two main

advantages:

1.

The power switch is a low sided one, unlike buck and buck-boost topology where it is an

hide side one and needs a floating driving circuit.

2.

The inductor is on the input side of the converter, limiting the slope of the input current.

The main disadvantage is that output voltage must always be higher then maximum input

voltage, which may limit some applications and may be a problem when a lower output

voltage is required.

Sepic topology has the above advantages and does not have the output voltage constraint.

As in buck-boost topology, output voltage can be higher or lower than the input voltage. An

additional advantage of sepic topology is that there are two inductors instead of one which

can be wounded in the same magnetic core. Using the proper turn ratio the input current

ripple can be reduced theoretically to zero and the input filter for the conducted electro-

magnetic interference strongly reduced (theoretically eliminated).

However, sepic topology, compared to boost topology, has the following disadvantages:

1.

The MOSFET and the output diode break-down voltages are higher as they are the

maximum reverse voltage when input and output voltages are summed (only output

voltage for boost converter).

2.

The current through the MOSFET is generally higher for the same output power.

1.1

Operation of the sepic converter

The basic schematic of the sepic converter is given in Figure 1.

Assuming that the average voltage across each inductor during one switching cycle, in

steady state operation, is zero, it can also be assumed than the average voltage over one

switching cycle across capacitor C1 equals the input voltage of the converter.

assumed that over one switching cycle, this voltage stays constant and equals the input

Across inductor L1 and inductor L2 we have the same voltages and the currents throug

them rise linearly with slopes inversely proportional to their inductances values.

When M1 is switched off (Figure 3), diode D1 starts to conduct and the energy previously

stored in inductor L1 and inductor L2 is released to restore the energy used up by capacitor

across the MOSFET is the sum of the voltage across capacitor C1, which is equal to the

sum of the input and the output voltage.