Startup sequence

AN2989

8/28

Doc ID 15761 Rev 1

2.1

Reading acceleration data

2.1.1

Using the status register

The device is provided with a STATUS_REG which should be polled to check when a new

set of data is available. The reading procedure should be the following:

The check performed at step 3 determines whether the reading rate is adequate compared

to the data production rate. In cases where one or more acceleration samples have been

overwritten by new data due to an excessively slow reading rate, the ZYXOR bit of

STATUS_REG is set to 1.

The overrun bits are automatically cleared when all the data present inside the device have

been read and new data have not been produced in the meantime.

2.1.2

Using the DataReady signal

The device may be configured to have one HW signal to determine when a new set of

measurement data is available for reading. This signal is represented by the XYZDA bit of

the STATUS_REG register. The signal can be driven to the INT1 or INT2 pins and its polarity

set to active-low or active-high through the CTRL_REG3 register. The interrupt is reset

when the higher part of the data of all the enabled channels has been read.

2.2

Output data rate selection and reading timing

The output data rate is user selectable through the DRx bits of the CTRL_REG1 (20h)

register. At power-on-reset, the DRx are reset to 0, thus providing a default output data rate

of 50 Hz.

The analog signal coming from the mechanical sensor is filtered by a low pass filter before

being converted by the internal ADC. The frequency at -3 dB of the low pass filter

determines the effective system resolution. The cut-off frequency depends on the DR<1:0>

bits in the CTRL_REG1 (20h) register (Table 2).

1

read STATUS_REG

2

if STATUS_REG(3) = 0 then goto 1

3

if STATUS_REG(7) = 1 then some data have been overwritten

4

read OUTX_L

5

read OUTX_H

6

read OUTY_L

7

data processing

7

goto 1