P-channel technology overview

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P-channel technology overview

The main target of silicon technology for P-channel structure has always been the R

DS(on)

improvement. Old planar devices (

Figure 1) show specific R

DS(on)

(also known as R

DS(on)

x

area) values, measured in m

desired specifications. But, in this way, costs increase and the dynamic performance of the

FET worses, due to higher intrinsic capacitances. To center the electrical specifications

required by modern applications, the fixed course is to choose trench technology for new

low voltage P-channel MOSFETs. New STripFET VI DeepGATE trench technology develops

in order to produce a P-channel Power MOSFET with low R

DS(on)

and high robustness

during reliability stress. The cross section of new trench MOSFET, highlighting both body

and source contacts, is reported in

Figure 2.

Figure 1. P-channel planar device structure

Figure 2. STripFET VI DeepGATE technology structure

GIPG131120130855FSR

GIPG131120130858FSR