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INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY

Most of the early semiconductor devices were made with PMOS technologies because it was

easier to obtain stable manufacturing process with this technology. As higher speeds and

greater densities were needed, new devices were implemented with NMOS. This was due to

the higher speed of N-channel charge carriers (electrons) in silicon and also to the progress in

the control of silicon doping. But CMOS technology has begun to see widespread commercial

use in memory devices: it allowed the use of very low power devices. At the beginning, CMOS

were slower than NMOS devices. Today, CMOS technology has been improved to produce

higher speed devices.

2.2 FABRICATION OF A TRANSISTOR

The fabrication begins with a slice of single crystal silicon, uniformly doped P-type.

The wafer is oxidized in a furnace to grow a thin

icon nitride is then deposited on the oxidized

wafer in a gas phase chemical reactor. The wafer

is now ready to receive the first pattern of what is

to become a many layered complex circuit. The

first pattern defines the boundaries of the active

regions of the integrated circuit, where transis-

tors, capacitors, diffused resistors and first level

interconnects will be made.

The patterned wafer is then implanted with boron

atoms. Boron will only reach the etched zones of

the silicon substrate, creating P-type doped

areas that will electrically separate active areas.

Wafer is oxidized again and the thick oxide only

grows in the etched areas due to silicon nitride’s

properties as an oxidation barrier.

The remaining silicon nitride layer is removed.

Now that the areas for active transistors have

been defined and isolated, the transistor types can be determined. The wafer is patterned and

implanted with dopant atoms.The energy and dose at which the dopant atoms are implanted

determines much of the transistor’s characteristics.

The transistor types defined, the gate oxide of the

active transistors are grown in a high temperature

furnace. The gate oxide layer is then masked and

holes are etched to provide direct access to buried

contacts where needed. A polycristaline silicon

layer is deposited on the wafer. The gate layer is

then patterned to define the actual transistor gates

and interconnect paths.