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ELECTROSTATIC DISCHARGE SENSITIVITY MEASUREMENT

Figure 1. Typical Equivalent HBM ESD Circuit

Notes:

– The performance of any simulator is influenced by its parasitic capacitance and inductance.

– Precautions must be taken in tester design to avoid recharge transients and multiple pulses.

– R2, used for Equipment Qualification as specified in Section 3.2 shall be a low induct-

ance, 1000 Volts, 500 resistor with ± 1% tolerance.

– Piggybacking of DUT sockets is permitted if waveform in socket is within spec limits.

– Reversal of terminals A and B to achieve dual polarity is not permitted.

– S2 should be closed 10 to 100 milliseconds after the pulse delivery period to ensure the DUT

socket is not left in charge state. S2 should be opened at least 10 milliseconds prior to the

delivery of the next pulse.

High Voltage

Pulse

Generator

R 2

R 1

C1

100 pF

S2

S1

DUT

socket

Terminal B

Terminal A

1500 ohm

500 ohm

short