LTC4416/LTC4416-1



4416fa

Overvoltage

V

V

R A R c R E

R c R E

V

k

FAIL

ETH

=

+

=

•

||

||

.

•

2

2

2

2

2

1 222

221

++

=

24 9 187

24 9 187

13 51

. ||

. ||

.

k

k

k

k

V

V

V

R A R c

R c

V

k

k

RESTORE

ETH

=

+

=

+

•

.

•

.

2

2

2

1 222

221 24 9

244 9

12 07

.

.

k

V

=

The over and undervoltage lockout circuits are shown here

working in tandem. It is possible to configure the circuit

for either over or undervoltage lockout by using only one

of the voltage paths and eliminating the components from

the other. Refer to Figure 7 for an LTC4416-1 configured

for overvotlage protection. If the input does not go below

ground, transistor Q1 can be eliminated.

The LTC4416-1 should be used in this configuration rather

than the LTC4416 because the LTC4416-1 will turn-off

rapidly if an over or undervoltage condition is detected.

RefertoFigure8foracomparisonofthetransientresponse

of the two ICs using the circuit configuration of Figure 6.

The LTC4416 will not turn-off quickly in an overvoltage

or undervoltage condition because the “fast-off” feature

is not enabled. This will cause the output to travel beyond

the desired range.

APPLICATIO S I FOR ATIO

Figure 9 contains a rapidly changing input voltage on a

much smaller time scale in comparison to Figure 8. The

up current being applied. The gate voltage will be pulled

The discharge time of the gate will be dependent on the

capacitance of the external FET and the initial gate-source

voltage of the circuit. The total time delay will equal:

t

t

t

t

c

V

I

DELAY

E OFF

DIScHARGE

E OFF

GS

G

=

+

=

+

(

)

(

)

(

•

∆

O

OFF)

Figure 8. Transient Response of the LTC4416 vs the LTC4416-1

Figure 9. Close Up of the Transient Response of the LTC4416-1

to a Rapidly Rising Input

Information furnished by Linear Technology corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

Figure 7. LTC4416-1 Configured for Overvoltage Protection

LTC4416-1

H1

E1

GND

E2

H2

G1

V1

V2

G2

R2C

24.9k

GND

R2E

187k

HYSTERESIS

TO

LOAD

4416 F07

R1A

100k

Q1

Q2

R2A

221k

5

0

0

20

LTC4416-1

LTC4416

40

TIME (ms)

4416 F08

60

80

10

15

20

LTC4416-1

LTC4416

13.40

13.45

LTC4416-1

GATE DISCHARGE TIME

= C

13.50

13.55

13.60

LTC4416

0

0

10

20

TIME (

µs)

4416 F09

30

5

15

25

35

40

∆V