2 UART SystemMemory boot mode

AN2260

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2

UART SystemMemory boot mode

2.1

UART SystemMemory code sequence

After SystemMemory mode is entered and the STR73x is configured as described above, the

SystemMemory code begins to scan the RXD0 line, waiting to receive a zero byte (one start bit,

eight '0' data bits, and one stop bit).

The duration of this zero byte is measured using the Timer Base 0. The count value of the timer

is then used to calculate the corresponding baud rate factor with respect to the current system

clock.

Next, the code initializes the serial interface accordingly, and sets up pin TXD0 to an alternate

function, push-pull output. Using this calculated baud rate, an acknowledge byte is returned to

the host which signals that the STR73x is ready to receive the 128 bytes of download data.

Note:

The watchdog timer is disabled during SystemMemory Mode, so the boot loading sequence is

not time limited.

Note:

The acknowledge byte is 0x95 for the STR73x devices.

Figure 2.

UART0 SystemMemory boot sequence

(1) Reset Stabilization & Code Initialization Time ( > 2ms)

(2) Zero Byte Reception

(3) Acknowledge Byte Transmission

(4) 128 Byte Loader Download

1

2

3

4

RSTIN

M1

RX

TX

Reset

SystemMemory UART branch

Downloaded

Code

SysMemory

Code

Code

128 Byte transfer