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AN2526 Datasheet(PDF) 6 Page - STMicroelectronics |
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AN2526 Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 10 page ![]() PCB layout recommendation AN2526 6/10 2 PCB layout recommendation For the purpose of maintaining 75 Ω track for all the analog lines, a 4-layer structure is recommended. All the analog tracks are routed on the top layer of the board. The middle two layers are used for both analog and digital ground. The middle two layers are identical and separated into two sections, analog and digital grounds. They are separated by a slot area and are only connected at the top layer through ferrite bead. This ensures that the digital switching noise does not get coupled to the analog portion. All the analog tracks are routed on top of the analog ground and all the digital tracks are routed on top of digital ground. There is one signal, the SEL line, which needs to cross from analog to the digital portion. The crossing is done at the bottom layer exactly below where the ferrite bead is used to bridge the analog and digital ground. Since the SEL digital line is mostly static during operation, it does not cause any disruption to the analog portion. STMAV340 supply is connected to VCC5V analog and GND analog. To further guarantee the stability of STMAV340 supply, a 100 nF capacitor is used to decouple the VCC pin. The stability of the analog supply lines is of significant importance since the bias level of STMAV340 is referenced to it. Any instability on the analog supply affects the switch characteristics. Each set of video signals, RGB1, RGB2, and RGB_OUT are routed with the same track length. This guarantees minimum channel-to-channel delay. To guarantee the impedance match on the analog lines, no via is used for routing these signals. 12 Jumper JP1, JP2, JP3, JP4, JP5, JP6, JP7, JP8, JP9, JP10. HDR 2X1 13 10k Resistor R1, R2 0603 Table 4. Bill of materials (BOM) (continued) No Component Designator Package Manufacturer |
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