AN3280

Software description

Doc ID 17983 Rev 1

11/13

2.1.3

TIM1 capture/compare interrupt

This interrupt occurs each time the TIM1 counter value is equal to the Compare register

value CCR1. During this interrupt process, conversion is triggered by setting the ADON bit

of the CR1 register.

Figure 5.

TIM1 capture/compare flowchart