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AN3422 Datasheet(PDF) 26 Page - STMicroelectronics |
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AN3422 Datasheet(HTML) 26 Page - STMicroelectronics |
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26 / 52 page ![]() Peripheral migration AN3422 26/52 Doc ID 018976 Rev 2 4.6 Interrupts The table below presents the interrupt vectors in STM32L1 series vs. STM32F1 series. The changes in the interrupt vectors impact only a few peripherals: 1. ADC: in the F1 series there are two interrupt vectors for the ADCs; ADC1_2 and ADC3. However in L1 series there is a single interrupt vector for ADC1; ADC1_IRQ. 2. As in STM32L1 series there are no CAN or TIM1 peripherals, their corresponding IRQs are now mapped to new peripherals: COMP, DAC, TIM9, TIM10, TIM11 and LCD. TIM15 TIM15_UP TIM15_CH1 TIM15_TRIG TIM15_COM DMA1_Channel5 DMA1_Channel5 DMA1_Channel5 DMA1_Channel5 NA TIM16 TIM16_UP TIM16_CH1 DMA1_Channel6 DMA1_Channel6 NA TIM17 TIM17_UP TIM17_CH1 DMA1_Channel7 DMA1_Channel7 NA AES AES_OUT AES_IN NA DMA2_Channel3 DMA2_Channel5 1. For High-density value line devices, the DAC DMA requests are mapped respectively on DMA1 Channel 3 and DMA1 Channel 4 Table 9. DMA request differences between STM32F1 series and STM32L1 series (continued) Peripheral DMA request STM32F1 series STM32L1 series Table 10. Interrupt vector differences between STM32F1 series and STM32L1 series Position STM32F1 series STM32L1 series 0 WWDG WWDG 1 PVD PVD 2 TAMPER TAMPER_ STAMP 3RTC RTC_WKUP 4 FLASH FLASH 5RCC RCC 6 EXTI0 EXTI0 7 EXTI1 EXTI1 8 EXTI2 EXTI2 9 EXTI3 EXTI3 10 EXTI4 EXTI4 11 DMA1_Channel1 DMA1_Channel1 12 DMA1_Channel2 DMA1_Channel2 13 DMA1_Channel3 DMA1_Channel3 |
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