January 2013

Doc ID 023074 Rev 4

1/13

AN2440

Application note

Embedded ECC in F8H process automotive EEPROM:

device architecture and related application guidelines

Introduction

The Error Code Correction (ECC) is a specific logic, embedded in certain EEPROM devices,

which can correct a single bit error when reading a binary word.

This embedded ECC algorithm is transparent for the Master bus and increases the data

read robustness. However, when comparing an EEPROM device with an ECC to an

EEPROM without an ECC, the two devices behave differently in some very specific cases.

The purpose of this application note is to describe the ST EEPROM ECC architecture in

order to understand the possible differences in certain specific user cases.

This application note applies to the automotive F8H process products listed in Table 1.

Table 1.

F8H process automotive products

Type

Part numbers

Memories

Automotive

products

SPI bus

products

M95320-A125/A145,

M95640-A125/A145,

M95128-A125/A145,

M95256-A125/A145,

M95512-A125/A145,

M95M01-A125/A145.

products

M24128-A125,

M24256-A125,

M24512-A125,

M24C64-A125,

M24C32-A125,

M24M01-A125.

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