Break sources summary

AN4277

10/23

DocID024409 Rev 2

3

Break sources summary

Table 2 summarizes the available break sources and their connections externally or

internally to timers (1, 8, 20, 15, 16 and 17) break inputs.

Table 2. Break input sources

BRK

BRK_ACTH

BRK2

External connection to pin BKIN

No corresponding I/O

BKIN2

Internal connection to

Comparators 4 and 7

for TIM1/8/20

NA for TIM15/16/17

– Clock failure event generated

by CSS

– Comparators 1, 2, 3, 5 and 6 for

TIM1/8/20 and

Comparators 3, 5 and 7 for

respectively TIM15, 16 and 17

– PVD output

– RAM parity error signal

(Hardfault)

Comparators 1, 2, 3, 4, 5,

6 and 7

Polarity feature in case of

internal connection

Configurable: active

high or active low

Always active high

Configurable: active high

or active low

Filter feature in case of

internal connection

Filter feature is

available

Filter feature is NOT available

Filter feature is available

Polarity feature in case of

external break event

Available

NA

Available

Filter feature in case of

external break event

Available

NA

Available

Available in

TIM1/8/20/15/16/17

TIM1/8/20/15/16/17

TIM1/8/20

Resulting break signal in

case of parallel external

or/and internal break

sources

It is an OR between the external break signal(s) and the internal one(s)