LT1166CS8 datasheet(6/16 Pages) LINER

6 / 16 page

LT1166

APPLICATIONS INFORMATION

as VIN. Similarly for VT, when positive voltage is applied to

RIN, current that was flowing in R1 and Q1 is now supplied

through RIN. This effect reduces the current in mirror Q5/

Q6. The reduced current has the effect of reducing the drop

on RT, and VT rises to make VO track VIN.

The open-loop voltage gain VO/(VIN – VPIN2) can be

increased by replacing RT and RB with current sources.

The effect of this is to increase the voltage gain VOUT/ VIN

from approximately 0.8 to 1 (see Typical Performance

Characteristics curves). The use of current sources in-

stead of resistors greatly increases loop gain and this

compensates for the nonlinearity of the output stage

resulting in much lower distortion.

Frequency Compensation and Stability

The input transconductance is set by the input resistor RIN

and the 32:1 current mirrors Q3/Q4 and Q5/Q6. The

resistors R1 and R2 are small compared to the value of

RIN. Current in RIN appears 32 times larger in Q4 or Q6,

which drive external compensation capacitors CEXT1 and

CEXT2. These two input signal paths appear in parallel to

give an input transconductance of:

gm = 16/RIN

The gain bandwidth is:

GBW =

π(RIN)(CEXT)

Depending on the speed of the output devices, typical

values are RIN = 4.3k and CEXT1 = CEXT2 = 500pF giving a

– 3dB bandwidth of 1.2MHz (see Typical Performance

Characteristics curves).

To prevent instability it is important to provide good

supply bypassing as shown in Figure 1. Large supply

bypass capacitors (220

µF) and short power leads can

eliminate instabilities at these high current levels. The

100

Ω resistors (R2 and R3) in series with the gates of the

output devices stop oscillations in the 100MHz region as do

the 100

Ω resistors R1 and R4 in Figure 1.

Driving Capacitive Loads

Ideally, amplifiers have enough phase margin that they

don’t oscillate but just slow down with capacitive loads.

Practically, amplifiers that drive significant power require

some isolation from heavy capacitive loads to prevent

oscillation. This isolation is normally an inductor in series

with the output of the amplifier. A 1

µH inductor in parallel

with a 10

Ω resistor is sufficient for many applications.

Setting Output AB Bias Current

Setting the output AB quiescent current requires no ad-

justments. The internal op amps force VAB = ±20mV

between each Sense (Pins 5 and 8) to the Output (Pin 3).

At quiescent levels the output current is set by:

IAB = 20mV/RSENSE

The LT1166 does not require a heat sink or mounting on

the heat sink for thermal tracking. The temperature coef-

ficient of VAB is approximately 0.3%/°C and is set by the

junction temperature of the LT1166 and not the tempera-

ture of the power transistors.

Output Offset Voltage and Input Bias Current

The output offset voltage is a function of the value of RIN

and the mismatch between external current sources ITOP

and IBOTTOM (see the Typical Performance Characteristics

curves). Any error in ITOP and IBOTTOM match is reduced

by the 32:1 input current mirror, but is multiplied by the

input resistor RIN.

Current Limit

The voltage to activate the current limit is

±1.3V. The

simplest way to protect the output transistors is to con-

nect the Current Limit pins 6 and 7 to the Sense pins 5 and

8. A current limit of 1.3A can be set by using 1

Ω sense

resistors. To keep the current limit circuit from oscillating

in hard limit, it is necessary to add an RC (1k and 1

µF)

between the Sense pin and the ILIM as shown in Figure 1.

The sense resistors can be tapped up or down to increase

or decrease the current limit without changing AB bias

current in the power transistors. Figure 4 demonstrates

LT1166CS8 Datasheet(PDF) 6 Page - Linear Technology

LT1166CS8 Datasheet(HTML) 6 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Datasheet Download

Link URL