7

LTC1456

OPERATIO

and CS/LD signals remain common to all chips in the daisy

chain. The serial data is clocked to all of the chips, then the

CS/LD signal is pulled high to update all of them simulta-

neously.

Voltage Output

The LTC1456's rail-to-rail buffered output can source or

sink 5mA over the entire operating temperature range

while pulling to within 300mV of the positive supply

voltage or ground. The output swings to within a few

millivolts of either supply rail when unloaded and has an

equivalent output resistance of 40

Ω when driving a load to

the rails. The output can drive 1000pF without going into

oscillation.

Serial Interface

on the rising edge of the clock. The MSB is loaded first. The

DAC register loads the data from the shift register when

CS/LD is pulled high. The CLK is disabled internally when

CS/LD is high. Note: CLK must be low before CS/LD is

pulled low to avoid an extra internal clock pulse.

When CLR is pulled low it asynchronously resets the shift

and DAC registers to all zeros.

The buffered output of the 12-bit shift register is available

LTC1456s may be daisy-chained together by connecting

CLR

CLK

CS/LD

µP

0.1

µF

GND

5V

LTC1456

1456 TA04

–

+

LT1077

Q1

2N3440

410

Ω

≈ 0mA TO 10mA

The circuit below shows a digitally programmable current

source from an external voltage source using an external

op amp, an LT

digital word from 0 to 4095 is loaded into the LTC1456 and

its output correspondingly swings from 0V to 4.095V. In

the configuration shown, this voltage will be forced across

current will range from 0mA at zero scale to 10mA at full

resistor of 50

Ω, the voltage source can be as low as 5V.

12-Bit 5V Single Supply Voltage Output DAC

CLK

CS/LD

µP

0.1

µF

OUTPUT

0V TO 4.095V

GND

LTC1456

CLR

TO NEXT DAC FOR

DAISY-CHAINING

4.5V TO 5.5V

1456 TA03

Digitally Programmable Current Source

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.