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RT1720GF Datasheet(PDF) 13 Page - Richtek Technology Corporation |
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RT1720GF Datasheet(HTML) 13 Page - Richtek Technology Corporation |
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13 / 19 page ![]() RT1720 Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS1720-00 November 2014 www.richtek.com 13 If the OV event is shorter than the TMR charge timing then examine the MOSFET’s safe operating area (SOA) graph, using VIN – VOUT for MOSFET drain to source voltage and ILOAD(VOUT) for the drain current, to determine if the over-voltage event will cause MOSFET damage. It may be helpful to adjust CTMR to meet the MOSFET’s SOA limits. If the OV event lasts more than one TMR cycle then the MOSFET will turn on and off, dissipating power each time it is on and linear regulating and cooling down when it is off. In this case, use one of the longer-timed areas of the SOA graph but adjust the drain current value by the 12% duty cycle of the MOSFET on periods to determine if the MOSFET will work. For thermal management, the MOSFET dissipation during long over-voltage events is : MOSFET(OV) IN OUT LOAD(VOUT) PD = DC V - V I where DC is the duty cycle of linear regulation, typically about 12%. During an over-current (OC) event the MOSFET will regulate the output current delivered to the load and the output voltage will collapse to whatever voltage is needed to sustain the OC threshold current. According to the timing determined by the capacitor connected at the TMR pin, the circuit will turn the load on and off periodically until the over-current event ends. While regulating the load current, the MOSFET will dissipate power and heat up. Unlike an OV event, the output voltage and the MOSFET’s drain-source voltage may not be easily predicted. If the output is shorted the voltage may collapse nearly to zero, placing the entire input voltage across the MOSFET. Further, this type of event is likely to continue for long periods. If the output voltage during the OC event is not easily determined, use zero for VOUT. For the rare OC event that is short compared to the TMR timing, examine the MOSFET’s safe operating area (SOA) graph, using VIN – VOUT for MOSFET drain to source voltage and your IOC_THRESHOLD for drain current, to determine if the over-current event will cause MOSFET damage. If the OC event lasts more than one TMR cycle then the MOSFET will turn on and off, dissipating power each time it is on and cooling down when it is off. In this case, use one of the longer timed areas of the SOA graph (perhaps the DC area) but adjust the IOC_THRESHOLD value by the 12% duty cycle of the MOSFET on periods to determine if the MOSFET will work. For thermal management, the MOSFET dissipation during long over-current events is : MOSFET(OV) IN OUT OC_THRESHOLD PD = DC V - V I where DC is the duty cycle of current regulation, typically about 12%. Parallel MOSFETs Select a single MOSFET for most applications. If the RDS(ON) target is very low and difficult to achieve at the necessary voltage rating, multiple devices may be used in parallel. Parallel devices can decrease the voltage drop in normal operation and reduce dissipation. However, SOA requirements must generally be met by a single device. In OV and OC conditions, GATE will decrease until the programmed output voltage or current is maintained. In that state, the MOSFET with the lowest threshold will carry more current than other parallel MOSFETs with higher thresho lds, perhaps dramatically more. It’s generally best to assume that one device will be subjected to the entire SOA stress. Shutdown The RT1720 enters a low current (7 A typical) shutdown mode when the voltage at the SHDN ̅̅̅̅̅̅̅̅̅ pin goes below its 0.5V logic-low level. In shutdown all functions are turned off, including the auxiliary amplifier. For automatic start- up, it’s recommended to connect SHDN pin to (1) A voltage between 3V and 45V through a 100k resistor. (2) A voltage higher than 45V through a resistor with minimum value of the following formula, RSHDN = [ VSHDN_max – 45V ] / 0.25mA No external voltage clamp is needed since the pin clamps the input voltage. If external board leakage is kept below 1 A, the pin can be left open and an internal current source will pull the pin voltage to about 2.5V. SHDN ̅̅̅̅̅̅̅̅̅ may also be driven by a logic output to turn the IC on and off. |
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