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RT9088 Datasheet(PDF) 2 Page - Richtek Technology Corporation |
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RT9088 Datasheet(HTML) 2 Page - Richtek Technology Corporation |
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2 / 11 page ![]() RT9088 2 DS9088-02 March 2015 www.richtek.com © Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Functional Pin Description Pin No. Pin Name Pin Function 1 REFIN Reference Input. 2 VIN Power Input of the Regulator. 3 VOUT Power Output of the Regulator. 4 PGND Power Ground of the Regulator. 5 SENSE Voltage Sense Input for the Regulator. Connect to positive terminal of the output capacitor or the load. 6 REFOUT Reference Output. Connect to GND through a 0.1 F ceramic capacitor. 7 EN Enable Control Input. For DDR VTT application, connect EN to SLP_S3. For other applications, use EN as the ON/OFF function. 9 PGOOD Power Good Open-Drain Output. Connect a pull-up resistor between this pin and VCNTL pin. 10 VCNTL Control Voltage Input. Connect this pin to the 3.3V or 5V power supply. A ceramic decoupling capacitor with a value 4.7 F is required. 8, 11 (Exposed Pad) GND Analog Ground. Connect to negative terminal of the output capacitor. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Ordering Information Note : Richtek products are : RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. Pin Configurations (TOP VIEW) WDFN-10L 3x3 REFIN VIN SENSE PGND VCNTL PGOOD GND REFOUT EN VOUT 9 8 7 1 2 3 4 5 10 6 11 RT9088 Package Type QW : WDFN-10L 3x3 (W-Type) Lead Plating System G : Green (Halogen Free and Pb Free) |
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